RISC-V is an architecture based on an instruction set (ISA, Instruction Set Architecture) open source. Unlike architectures like x86 and ARM, RISC-V is free from constraints license and can be used, modified and distributed without paying royalties or facing intellectual property restrictions. In another article we saw what RISC-V is and why there is so much talk about it.
Many companies are focusing heavily on RISC-V thanks to the possibility of developing customized or specific products without having to pay for licenses flexibility e all’adaptability of the platform which make it particularly suitable for specific sectors such as the Internet of Things (IoT),edge computing and artificial intelligence.
Reduced costs, independence from specific suppliers, the presence of an active and ever-growing community, the possibility of counting on an approach based oncollaborative innovationhave convinced many industrial companies to make investments in RISC-V.
Nothing prevents, however, from developing intellectual property by exploiting the basis provided by RISC-V: an example of this is the RISC-V vector unit from the European Semidynamics, expressly intended for machine learning e artificial intelligence. Qualcomm itself, which recently confirmed its commitment to the ARM platform with the launch of the Snapdragon X SoCs intended for the PC world, explained in detail why it is investing in RISC-V.
Not to mention the legendary chip designer, Jim Kellerwhich on the one hand observes how the competition between ISA ARM64 and x86-64 is cloying and out of place, on the other hand explains that RISC-V will take care of shaking up the market, because it is a young platform, without heavy burdens that have accumulated over the years to be managed due to compatibility issues.
RISC-V still needs to improve – here’s why
As part of a study carried out by a group of academics from the University of Edinburgh (Scotland), assisted by colleagues from the PerfXLab laboratory, the researchers wanted to test the behavior of what is currently considered the RISC-V processor produced in the most powerful series in the world. It’s Chinese Sophon SG2042the first 64-core RISC-V processor for high-performance workloads.
For their experiments, the experts at supercomputerthey used the Milk-V Pioneer system, in which the SG2042 processor is mounted on a Micro-ATX motherboard (costs around 1,150 euros including the CPU).
Using numerous benchmarkresearchers measured performance in single thread and those multi thread of the SG2042 processor. In particular, they carried out several processing tests with single and double precision floating point calculations (FP32/FP64). Many algorithms used by the research team in HPC (High Performance Computing) form the basis of the benchmark Linpackused for example to determine the ranking in Top 500 of the fastest supercomputers in the world.
Well, it turns out that each of the 64 C920 cores that make up the SG2042 works on 128-bit vector units, they share 1 MB of L2 cache every four cores and all 64 use 64 MB of L3 cache (in another article we see what a processor’s cache is). The memory controller handles four channels for DDR4-3200 RAM.
As expected, each individual core of the SG2024 ensures much higher computational power than, for example, one StarFive JH7110. However, each C920 core offers four to twelve times the performance computing power of a StarFive U74 core, with a 33% higher clock speed.
x86 platform still ahead
The growth at home RISC-V is impressive. However, if the term of comparison is the performance of x86 processors, RISC-V still needs to improve. Really a lot, according to the researchers.
From the tests carried out, it emerged that even theIntel Xeon E5-2965v4 from seven years ago with only 18 cores “on board” it carries out processing much faster than the 64 RISC-V cores of the SG2042.
Scholars have identified some weak points such as number of memory controllers for NUMA node. NUMA (Non-Uniform Memory Access) is a system architecture in which multiple processors share memory, but accessing certain portions of memory takes different times. Memory controllers manage memory access across different NUMA nodes.
The future adoption of RISC-V RVV vector specification v1.0 should help improve the performance of NUMA nodes and also optimize the performance of compilers such as GCC (GNU Compiler Collection) e Clang.
More powerful RISC-V cores coming soon
Several companies active in the development of RISC-V processors have already announced core RV64GC significantly more powerful. However, it will take several years before mass production of SoCs equipped with these new, more updated and much more powerful cores finally begins.
For example, SiFive had already announced the aforementioned U74 of the StarFive JH7110 processor in 2018, which will only be available from the beginning of 2023. The U74, however, has already disappeared from the company’s official website.
One of the highest performing RISC-V cores announced in recent times is the SiFive P670: your presentation dates back approximately a year ago. Even more updated and powerful is the SiFive Performance P870.
Ventana Microsystemsin turn, is working on a RISC-V chiplet processor that uses a 5nm manufacturing node and uses up to 192 cores in the same packagewith a clock frequency of up to 3.6 GHz.
In the end, computing accelerators RISC-V for AI-related inference tasks, are now available as branded PCIe 4.0 cards Esperanto Technologiesformer Transmeta founder Dave Ditzel’s company. Esperanto ET-SOC-1 It has over 1,000 RISC-V cores and you can install up to 16 cards totaling over 16,000 RISC-V cores in a rack server with two Intel Xeon processors. Despite the still unconvincing performance, the future of RISC-V promises to be very bright.