Veyron V2 RISC-V sfida i processors AMD EPYC

Processors based on RISC-V architecture will be increasingly present on the global IT scene, establishing themselves first in data centers and in the HPC sector and then recording greater adoption mainstream. According to the legendary CPU designer Jim Keller It’s not a question of “if” it will happen but “when” it will happen. And in an article from mid-October 2023 we said that RISC-V still has to improve in terms of computing power despite having all it takes to do well.

What is the Ventana Veyron V2 processor and what does it look like

Ventana Veyron V2 is a new RISC-V processor, just presented, designed for data centers that differs from existing solutions.

The device adopts a chiplet approach, using an I/O hub and accelerators connected with UCIe interface to obtain 192 core per socket. It doesn’t necessarily aim to achieve the per-core performance of the AMD Zen 4cbut focuses precisely on UCIe support and the concept of Domain Specific Acceleration (DSA), whose idea is to create hardware accelerators designed to efficiently handle particular operations or specific workloads.

The solution developed by Ventana engineers aims to offer a greater efficiency in managing specific workloads, such as encryption, compression or transcodingtherefore adapting to the needs of different sectors.

Ventana Veyron V2 RISC-V processor features

The main features

Between characteristics main features of Veyron V2, in addition to UCIe support, we mention the vector extensions RISC-V (RVA23), a level 3 (L3) cache of up to 128 MB, the use of the AMBA CHI implementation (developed by ARM) to ensure data coherence in systems where multiple processors or cores work together, the presence of RAS functionality (Reliability, Availability, Serviceability) as ECC (Error Correction Code) and protection from the activities of data poisoning.

Ventana’s business strategy appears to be about offering flexibility and adaptability, allowing customers to design their own custom I/O hubs and integrate FPGA chiplets or ASIC accelerators to optimize workload efficiency, rather than just aiming for maximum computing performance.

Competing with AMD Bergamo and Genoa CPUs

Although the performance per core is not equivalent to that of the Zen 4c, according to Ventana its Veyron V2 already exceeds the performance of the AMD Bergamo and Genoa processors.

Comparison Ventana RISC-V with AMD, Intel, Ampere processors

The competition, however, will become increasingly fierce in the future because the chiplet DSAcapable of accelerating specific workloads, will compete to offer significantly higher performance than that obtainable with traditional CPUs without hardware acceleration. Me too’hub I/O it can be customized with hardware acceleration, which AMD doesn’t offer.

Ventana says his approach to CPU design using DSA chiplets and hardware will reduce development time to less than a year and costs to less than $25 million. According to the company, it would take the double the investments in the case of x86 and ARM CPUs to match Veryon V2.


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